EXCITE Project is an open collaboration between the California Institute for Telecommunications and Information Technology (Calit2) and the Ericsson Research, with a vision to bring fast and flexible prototyping and experiment capabilities into early stage research on wireless systems and networking in both institutes.

The prototype and experiment based wireless system research is a holistic approach. It provides a practical platform to verify innovative ideas and concepts in a full system setup, and demonstrates performance improvement using real end user applications in the real environment with real data and channels. Combining simulation and prototype experimentation, we are uniquely positioned to bring valuable ideas and experiences to the development and deployment of future generation wireless access networks.

The EXCITE project adopts the Matlab and Simulink with hardware specific blocksets for the physical layer FPGA development. Since signal processing algorithms account for a large portion of computing in a wireless modem design, this system level design flow not only help researchers to speed up the process from ideas to hardware, but also able them to perform joint algorithm-architecture-circuit optimization, which are not possible using traditional FPGA design flows. The major MAC layer protocol functions are implemented using embedded processors, and the network layer protocols and applications reside in host PCs.

Current activities of the EXCITE project span the following three areas:

• Investigate and demonstrate innovative concepts for wireless access network towards LTE-Advanced and beyond. Recent thrusts focus on cooperation among multiple nodes in heterogeneous infrastructure network, such as Cooperative Multiple Point (CoMP).
  
• Establish and improve the wireless networking fast prototyping test-beds, which provide flexible programmability across all layers of wireless communication systems, including radio frontend control, physical layer waveforms and signal processing algorithms, wireless media access control and networking protocols, as well as end user applications.
• Develop tools, define procedures, organize design files in order to facilitate and speed up wireless modem prototyping using the Matlab/Simulink design flow.